PC/CP220 Digital Electronics Lab (Thursday sections)

This page is being updated for Fall 2017.

This is the PC/CP 220 Lab page, created and updated by Terry Sturtevant .
Page last updated Thursday May 25, 2017
**Items marked this way are not final.**


Week 1, Week 2, Week 3, Week 4, Week 5, Week 6, Week 7, Week 8, Week 9, Week 10, Week 11, Week 12

Introduction

Evaluation Methods

Course Material

Week of ... Lab Topic(s) Reference Material
[ this background indicates required reading;
this background indicates optional reading
this background indicates important items
this foreground indicates updated items
this background indicates weekly topics
this foreground indicates unrevised items ]

 
Introduction
Integrated circuits
Pinouts, breadboards, and debugger boards

Sept. 7

N2083 Lab bench layout [video]
bench supplies



This has cool history on where the term "breadboard" came from
Basics of Breadboarding [video]

breaboard history


Collin's Lab: Schematics [video]

schematics


How to Wire Circuits from Schematics [video]

?

 
Resistors (including arrays), LEDs and switches
Watch videos and do quiz before lab!
Input device: prototype switch
Output device: LED

Sept. 11

This week you'll learn how some common input and output devices are used. (The debugger board used previously hides some of the details.)

Resistor colour codes   [ July 25, 2003 ]


LEDs [screencast of PDF]
LEDs


Choosing resistors for LEDs [video]
LED resistors


Switches [screencast of PDF]
switch


Choosing resistors for switches [video]
switch resistor

 
Introduction to Quartus II
Watch videos and do quiz before lab!
Design skill: Circuit drawing and simulation

Sept. 18

Drawing a circuit diagram and simulating its operation can be done with software. This week you'll learn how.



Quartus II Introduction
quartus II


Simulating with QSim (version 13)
qsim

Timing Diagrams [video]
timing diagram

Quartus II Introduction using the ModelSim Simulator with Forced Outputs   [ May 12, 2017 ]

Using the ModelSim Vector Waveform Editor with Quartus II   [ May 12, 2017 ]

Using Testbenches in Quartus II   [ May 12, 2017 ]


 
Using Quartus II
Watch videos and do quiz before lab!
Multiplexers
Gates with "extra" inputs; strobes, enables, etc.

Sept. 25
  • New Information: Enable, Gate, and Strobe Inputs [PDF]   [ January 31, 2014 ]

  • New Device: Multiplexers [PDF]   [ October 12, 2016 ]

  • Lab: Quartus II Task   [ September 18, 2017 ]
    Switch who uses the computer and who supervises from what you did last week.

  • If you haven't done the computer algebra system exercise, do it this week.

  • Project Phase I due (attach checklist )

  • Before next lab: Read documents (or watch videos) about keypads and then do the quiz on MyLearningSpace.

    The quiz will be available from Friday (before Reading Week) at 7 a.m. until Sunday (at the end of Reading Week) at 11:30 p.m. It will not be available the day of your lab, so you must do it ahead of time.




Enable, Gate and Strobe inputs [screencast of PDF]
enable, gate, and strobe inputs


Multiplexers [screencast of PDF]
multiplexers

Multiplexers
multiplexers


 
Encoders
Keypads (with resistor arrays)
Active low signals
"No connection" pins
Watch videos and do quiz before lab!
Input device: Keypad

Oct. 2

This week you'll learn to use a keypad for digital input.

  • Review: Debugger boards [HTML]   [ May 12, 2017 ]

  • Review: Switches [PDF]   [ April 6, 2011 ]

    New Device: Keypads [PDF]   [ October 13, 2011 ]
    Keypads [HTML version]   [ May 12, 2017 ]

  • New Device: Resistor Arrays [PDF]   [ April 7, 2011 ]
    Resistor Arrays [HTML version]   [ May 12, 2017 ]

  • New Device: Encoders [PDF]   [ January 26, 2012 ]

  • Lab: Encoders   [ September 18, 2017 ]
    Be sure to put the resistor arrays back in the correct bin after the lab. To identify the value, look at the number printed on the array, as in the following examples:
    • 1kΩ Note the 3 digits after the second dash.
      The number 102 indicates the resistor value of 10x 102Ω, or 1000 Ω
    • 1kΩ Note the 3 digits after the second dash.
    • 1kΩ Note the 1K on the right.
    • 470 Ω Note the 3 digits after the second dash.
      The number 471 indicates the resistor value of 47x 101Ω, or 470 Ω
    • 220 Ω Note the 3 digits after the dash.
    • 10kΩ Note the 3 digits after the second dash.


  • Before next lab: Read documents (or watch videos) about 7 segment displays and then do the quiz on MyLearningSpace.

    The quiz will be available from Friday at 7 a.m. until Sunday at 11:30 p.m. It will not be available the day of your lab, so you must do it ahead of time.




Keypads [screencast of PDF]
keypad


Resistor Arrays [screencast of PDF]
resistor array


Encoders [screencast of PDF]
encoder

Priority encoders
How to cascade encoders


Reading Week

Oct. 9 READING WEEK - No labs

 
Decoders
Gates with "extra" inputs; strobes, enables, etc.
7 segment displays
Push button (or momentary) switches
Watch videos and do quiz before lab!
Input device: Pushbutton switch
Output device: 7 Segment display

Oct. 16

This week you'll learn to use momentary switches for digital input, and 7 segment displays for output.


Pushbutton Switches [screencast of PDF]
pushbutton


7 Segment Displays [screencast of PDF]
7 segment displays


Testing a Common Cathode 7 Segment Display [video]
common cathode


Testing a Common Anode 7 Segment Display [video]
common anode


Decoders [screencast of PDF]
decoder


Enable, Gate and Strobe inputs [screencast of PDF]
enable, gate, and strobe inputs

Minimal Boolean Expressions [video]
minimizing boolean exprerssions


Karnaugh Maps (K-Maps) [video]

Karnaugh maps


Don't Cares [video]
don't cares in Karnaugh maps

Display decoders
Karnaugh Maps


 
CPLDs
Assigning pins in Quartus II
Downloading designs into CPLDs
Bargraph LEDs (with resistor arrays)
Output device: Bargraph LED
Design skill: Using programmable logic
Oct. 23

This week you'll learn to use programmable logic devices and bargraph LEDs for output.



Bargraph LED displays [screencast of PDF]
bargraph LED


Quartus II CPLD Programming
Quartus CPLD

A commercially available board similar to the one you are using is the LC MAXII EPM240 CPLD board. (It uses the EPM240T100C5N chip from the MAXII family.)


 
CPLD Lab Task
Design skill: Good drawing for schematics

Oct. 30

Drawing tips for digital circuits [screencast of PDF]
drawing tips for digital circuits

 
Design Project
Nov. 6
XOR and XNOR gates in Karnaugh Maps (starting at page 14)
[PDF; © 2009 Carlton University]

 
Design Project: Focus on prototype

Nov. 13
  • New Information: Prototype options
    Note: If you include input or output devices as discussed below in your CPLD, make sure that all of your original specified signals are still connected to I/O pins. This is important so that the operation of your original circuit can be seen by these alone.
    Add circuits as needed to your drawing without changing any of the original connections, and make the new connections externally. This will avoid messing up your existing circuit, while making it possible to fall back to a debugger board if there are problems.
    • Included 7448 7-segment display driver
      If you are going to display a digit from 0 to 9 for your output, then it is possible to use a 7-segment display by adding a 7448 decoder inside your CPLD. (If you do so, remember that you will have to tie the other input pins appropriately, and not leave them floating.)
    • Keypad encoding
      If you want to use a keypad for input, and need all 16 inputs, you can cascade encoders. The parts are in the Quartus II "Maxplus II" libraries, so you can make it part of your circuit.

      HEX keypad encoder in CPLD
      HEX keypad encoder


    • Bigger CPLD
      You may have the option of using an LC MAXII EPM240 CPLD board, which uses the EPM240T100C5N device from the MAXII family. These have many more inputs and outputs, which is particularly useful if you want to incorporate a hex keypad encoder or 7 segment display driver into your design, since they can be included in the CPLD itself, rather than as external devices.
      Note: The bigger CPLDs are 3.3V devices, so there are some special considerations that have to be observed if you want to use them. Be sure you understand these before you begin.
      CPLD layout tips for digital circuits [HTML version]   [ May 12, 2017 ]
      CPLD layout tips for digital circuits [PDF]   [ May 24, 2016 ]

  • Project Phase III due (attach checklist )

  • Prepare project Phase IV for two weeks from now
    Phase IV marking

    Note: 1/5 of the project Phase IV mark will be for demonstrating the working prototype with final inputs and outputs in either week 10 or week 11. This is to ensure that all wiring is complete before the final demonstration.



    Sample Phase IV Poster (single output)
    prime number identifier   [ April 29, 2015 ]
    Note: My poster doesn't contain any testing information. This is an oversight.

    Sample Phase IV prototype
    phase IV prototype test


  • Project Phase IV Preparation:
    Project Phase IV Process
    [PDF]   [ November 30, 2016 144K ]

    Lab Task: Week 1


CPLD test program
cpld tester program

CPLD test program (other direction)
cpld tester program 
       (other direction)

Glitches and Hazards in Digital Circuits
Eliminating Hazards


 
Design Project: Focus on poster

Nov. 20
  • Prepare project poster and prototype for next week

    If you are having a poster printed professionally, note that there is often an additional charge for rush jobs, and there may be a normal turnaround time of a day or more. Dont leave it until the day before your presentation to print.

  • Project Phase IV Preparation: Week 2

Poster Presentation
Preparing a Poster Presentation
Rock, Paper, Scissors glove



Poster Design: Layout [video]

poster layout

 
Project Presentation
Nov. 27
  • Project Phase IV: Final Presentation
    You will set up your poster and prototype, and mark other students' projects.

    There will be a deduction from the final project mark of 10% for every 5 minutes of lateness for the final presentation. In other words, 10 minutes late will mean 20% will be deducted from the final project mark. Groups that are on time should not have to wait for others who are late.

    (About 5 minutes at the beginning of the lab will be for setup. Marking will begin after that.)

    New:Early set-up times:
    On each day there will be times available ahead of the lab for checking your prototype, attaching keypads or prototype switches, etc.
    The times are:
    • Monday sections- Monday Dec. 4 after 8:30 a.m. and before 11:30 a.m.,
      1:00 p.m - 2:30 p.m.
    • Tuesday sections- Tuesday, Dec.5 after 11:30 a.m. and before 1:00 p.m.,
      2:30 p.m - 4:00 p.m.
    • Wednesday sections- Wednesday, Dec.6 after 8:30 a.m. and before 11:30 a.m.,
      1:00 p.m - 2:30 p.m.


  • Lab evaluation


Resources

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