Pages created and updated by Terry Sturtevant Date Posted: May 12, 2017


Digital Design Project

For this part of the course, you will be given a choice of circuits to design; see the Project List. You must have your project chosen by week 3; only one group per project. Selection will be done in the lab. You will work with your partner on all phases of the project. The requirements for the various phases are indicated below. At the end of the design project, you will be required to display a poster for your project as well as demonstrate a working prototype using the Altera PLD board.

Phases of the Project:
The project will be completed in the following phases:

  1. Conceptual Design Specification

    The design specification will describe the problem to be solved by the circuit (i.e. what it is supposed to do). This design specification should clear up potential ambiguities in circuit behavior; for example, whether rounding or truncating is to be used in an arithmetic circuit, if there are any unused cases.

    Deliverable:

    title page with project name and student information, written design specification, Phase I checklist attached to the back

    Weight:

    1/8 of project mark



  2. Logic Design and Verification

    This section will describe in detail and verify the logic necessary for the circuit.

    You will need to produce an equation for each output of your circuit. The easiest way is to produce a SOP (i.e. sum-of-products) equation for each.

    It will probably include:

    1. truth tables (or logic equations if more appropriate) [Note that using "don't care"results where possible in a truth table may simplify the logic greatly.]
    2. Karnaugh maps (or algebraic reductions)
    3. reduced logic equations (to reduce complexity and number of gates used)
    4. results of testing final equations using a computer algebra system.
      Your final logic equations must be tested to make sure they are correct. Using a computer algebra system like Maple or Maxima will make this easy.

    The logic design may indicate circuit behaviours that were not considered and, consequently, not specified when the design specification was developed. Revise the design specification (Phase I) if necessary.


    Deliverable:

    title page with project name and student information, logic design, completed Phase I (updated if necessary), Phase II checklist attached to the back

    Weight:

    1/8 of project mark



  3. Schematic Design and Simulation (to be done in Quartus II)

    Circuit Diagram - This section will provide a diagram (or diagrams) of the circuit showing all connections and chips to be used. You must also include a parts list, which you will need to have anyways before you start to build. Your project must include an input device ( keypad, momentary, or DIP switch) and an output device (individual or bargraph LEDs or 7-segment display).

    Circuit Simulation - This section will provide a logic simulation which demonstrates that the circuit performs as expected. This section should include an explanation of choices made regarding what to simulate, and should present the results in a concise, easy-to-read fashion.
    Your simulation is vital to ensure that your prototype will function correctly.

    Deliverable:

    title page with project name and student information, schematic design (diagram and simulation), parts list, completed Phase I and Phase II (updated if necessary), Phase III checklist attached to the back

    Weight:

    1/8 of project mark



  4. A: Produce and Test Prototype

    Prototype Test Results- After verifying the validity of the logic by simulation, you can download your circuit to the CPLD board.
    Test it first using the debugger board for both inputs and outputs.
    This will verify that your CPLD is correct.

    Once you have confirmed that the circuit works, you can wire the inputs and outputs to demonstrate your circuit.
    You want to choose appropriate input and output devices so that your prototype is easy to test.
    If you leave the debugger board connected to your inputs and outputs, and put both banks in display mode, it will make it easier to test the operation of your input and output devices.
    Since the previous step verified that your CPLD was correct, any errors now will be due to mistakes in wiring the inputs and outputs.

    At least a week before the final presenatation, demonstrate the working prototype, so that the final presentation only needs it to be powered up; i.e. no further work on the prototype is required.

    Deliverable:

    early demonstration of prototype with final inputs and outputs.

    Weight:

    1/8 of project mark


    B: Produce Poster

    A poster must be created to present your project to the class. The size should be no more than 1m square with the whole poster able to fit in a 1m square display case. (These are the cases in the hallway outside the physics and computing labs.)
    Your poster should contain your design specification, logic design, circuit diagram, circuit simulation, a brief description of your testing procedure, and outline any significant problems encountered along the way. Your phases 1-3 should provide all the information needed to develop the poster.

    The purpose of the poster is to illustrate the design process with your circuit as an example.

    You will want to include test instructions on the poster so that your prototype is easy to test.
    Keep in mind that if someone doesn't understand how to test your circuit, they may think your circuit doesn't work even when it does.

    Deliverable:

    poster presentation and demonstration

    Weight:

    4/8 of project mark

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