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Pages created and updated by Terry Sturtevant Date Posted: July 21, 2014


Quartus II Tutorial

Introduction

Altera Quartus II is available for Windows and Linux. The instructions here are from version 11.0, with some updates for versions 12.0, 12.1 and 13.0. I try to keep it up to date.

On my YouTube channnel, I have a series of videos about Quartus II.

Using Quartus II

  1. Opening Quartus II

  2. Creating a project

    1. Creating a New Schematic
    2. Adding Text
    3. Adding Components
    4. Wiring the Circuit
    5. Printing
    6. Choosing a Device
  3. Simulation
    Note: Since version 11.1 of Quartus II, the QSim simulator has been automatically included with Quartus II, for Windows and Linux. For simple simulations, it is easy to use.
    Following are instructions for simulations using either one.

    Simulation (using QSim)


    Simulation (using ModelSim)

    1. Preparing for the Simulation
    2. Methods of Simulation
      1. Forced Inputs
      2. Waveform Editor
      3. Testbenches
    3. Examining the Output
  4. Programming CPLDs

    1. Preparing Circuit for CPLD
    2. Assigning Pins
    3. Recompiling Design
    4. Selecting the Programmer
    5. Connecting to the Programmer
    6. Problems with the Programmer
    7. Wiring the Input and Output
    8. Troubleshooting

In this tutorial, we will show you how you capture the schematic design for the automatic door opener circuit using Altera Quartus II software.

The Problem

We are designing a circuit for an automatic door like those you see at supermarkets. The door should open only when a person is detected walking through or when a person presses a switch (such as the wheelchair button) to have the door open. The door should only operate if it has been unlocked.

I: Drive

During Labs you will need to save all your work under a directory called CP120 in your Home Directory (drive I:)

To get to your I: or your Home Directory double click on My Computer icon on the desktop.

Under I:\CP120 create the following folders

schematic

Copy this directory from the I drive to the E drive. There are currently problems saving files directly to the I drive. Be sure to copy your files back to the I drive after you are done.

Getting Started with Altera Quartus

Launch the Altera Quartus software. You should see a screen such as this:

opening screen

Creating a New project

Select the File New Project Wizard; a window like the following will appear.

To select the working directory use the button to browse and select E:\CP120\intro.
Name the project DoorOpener. (Note that the next field gets filled in automatically.) Select Finish.
Don't uses spaces in file or directory names.

new project wizard

Creating a new Schematic design

Select File New - A window as seen in the following picture will open.

Select 'Block Diagram/Schematic File' and press OK.

block diagram

This should open a pane where you will design your circuit. This pane is designated Block1.bdf. Save this graphic design file as DoorOpener in your "intro" directory. The file will be given the bdf extension; bdf stands for block design file and contains schematics, symbols or block diagrams.

Adding text

  1. There is a toolbar on the Block Diagram/Schematic File drawing pane. (This toolbar is also known as the palette). Select the A from the palette.

    adding text

  2. Select a point near the top left in the window with the left mouse key.
  3. Type your name and then hit the Enter key.
  4. Type your project name and then hit the Enter key.
  5. Type the following equation, f = hc' + pc' , and then hit the Enter key.
  6. Hit the Esc (escape) key to end text additions.

adding text

Adding a Component

  1. Click the library icon from the palette.

    library icon

    The Symbol dialog box will appear. This window lists the available Altera libraries as seen in this image.

    adding component

  2. Expand the /altera/⟨current-version⟩/quartus/libraries folder, expand the primitives folder and then expand the logic folder.
  3. In the logic folder, select the and2 component by double clicking on it (or by selecting it with a single click, then selecting OK).
  4. Click the pointer at the desired location in the Block Diagram/Schematic Editor window to insert the AND symbol into the design file.

Repeat these steps to enter an OR (or2) gate and a NOT (not) gate.

(If you wanted to add multiple NOT gates, you could select the Repeat-insert mode box.)

In the same manner that you placed a gate onto the palette, add three input pins and one output pin from the Symbol libraries. Input pins can be found under primitives | pin | inputs. Output pins can be found under primitives | pin | outputs.

Name your input and output pins as you name them in your equation. Double click on the pin name to change its name.
Never use spaces in pin names; e.g. "input 1" is a problem - "input1" and "input_1" are ok.

Rearrange your devices in approximately the placement you would like for the logic diagram you are trying to construct. You can move a component by selecting it with your mouse, holding down the left button and moving it to another location on the palette.

Save your design. It is a good idea to save your design often, just in case something bad happens . Save the bdf file with the same name as the project.
Don't use spaces in any file names.

saving bdf file

Wiring your circuit

Select the orthogonal node tool. Orthogonal Node Tool Place your pointer on the output of one of the input pins and hold the left mouse button down. You should see a cross-hairs or + appear at the output.

Drag your pointer to the input of the AND gate. Every time you release the mouse key, the line (wire) ends. If your wire did not reach the AND gate, you can add to the wire by putting your mouse over an end of the wire and again selecting it with your left mouse button and dragging your mouse to another position.
correct wiring
Don't run wires along the edge of a device. This can cause simulation problems.
wires on edges
Don't leave inputs and outputs right next to the chips. Make sure you can actually see some wire between them, otherwise you may have simulation problems.
touching edges

Note: Make sure you do not make the wire too long. If you drag it too far you will see an x; and this is considered an open connection and your design will not compile.

To delete a wire or a portion of a wire, simply click on it (it should change color to indicate selection) and press the delete key.

If wires are connected to the component as you are moving it, the wires will drag and stay connected to the component. This is referred to as "rubber banding" and is a feature of all major schematic entry design packages. (You can turn rubberbanding on and off using the rubberbanding tool.Rubberbanding Tool )Add the rest of the wires needed to connect the logic diagram.

The window should look something like image below. Save your design.

finished circuit screen shot

Printing

We will not print today. But you will need to know how for your project.

To print, go to File | Print. If you want to change what appears on the printout or how it appears, go to File | Page Setup change print settings. Before printing, you can view what the print will look like by selecting File | Print Preview

Choosing a Device

The programmable device which we'll use for our design can be chosen now.

Select Assignments | Device from the pull-down menu.

assigning a device

Select MAX7000S from the "Family" pull-down list. Select the "Specific device selected" and then choose EPM7064SLC44-10, which is the device we are using in our lab. Select "OK."

choosing the 7064slc

If you get a message like this, don't worry; it's fine.
logic lock message

Circuit Compilation

You will need to compile your design to ensure you do not have any errors in your circuit (e.g. you do not have any open connections, etc.)

Click on Processing | Start Compilation to start compilation.

compile menu

Circuit Simulation (using QSim)



If you're using a version of Quartus II lower than 13.0, use the instructions for earlier versions.

Simulation using QSim for version 13.0

Note: In version 13.0 of Quartus II, QSim can be opened directly from within Quartus II, however it only works with Cyclone devices. If you've already chosen a non-Cyclone device, switch to a Cyclone device to do the simulation. Once you know your logic is correct, you can switch back to your original device.

To program a device, go to Programming CPLDs



Simulation using QSim for versions 11 and 12

Note: QSim can't be opened automatically from within Quartus II. You can invoke it by typing
quartus_sh --qsim
at a command prompt. (Run this in the directory where you find the Quartus II executable file.)

Go to Programming CPLDs



Circuit Simulation (using ModelSim)

Before simulating, some preparation is required.

Configure NativeLink settings:

more nativelink settings

Convert the schematic diagram into VHDL code for simulation.

Add the VHDL file to the project and compile for simulation.

Library Compilation

It may be necessary to compile the libraries for your device family before you simulate.
If you are using Modelsim-Altera, you will not need to do this. All of the libraries are precompiled. If you are using Modelsim, you may need to do this.

Click on Tools | Launch EDA Simulation Library Compiler.

library compile

The MAX7000S family should already be selected, so click Start Compilation.

compile MAX7000 family

Don't worry if you get any error messages.

Methods for Simulation (using ModelSim)

There are three different methods for simulation. The simplest is using forced inputs. It is easy to use with very simple circuits, but is cumbersome with more complicated ones. The next method uses waveforms, which is slightly more complex but well suited to combinational circuits where all that is needed is to go through all possible input combinations. The last method uses testbenches, which is the most complex but the most powerful. For sequential circuits where specific sequences of inputs must be tested, it is essential.


Simulation using Testbenches

Create a testbench to automate your simulation.
Add the testbench VHDL file to the project and compile for simulation.
Launch the ModelSim simulator.
Open waveform window and add signals to be simulated.

Go to Examining the Output







Simulation using Forced Outputs

Launch the ModelSim simulator.
Open waveform window and add signals to be simulated.
Enter signal values using force.

Go to Examining the Output







Simulation using Waveforms

Launch the ModelSim simulator.
Create signals with the Waveform Editor.

Adjusting the output display

Background:

Programmable Logic Device, or PLD, is a general name for a digital integrated circuit capable of being programmed to provide a variety of different functions.(The "C" in CPLD stands for "complex".)

Why use a PLD?

A PLD is good for prototyping designs. Only a single chip is required to implement a complete logic design. It allows us to simplify designs and reduce development times. Changes in the design can be easily implemented by reprogramming the device. Simple PLDs (such as the one we use in our lab) can realize from 2 to 10 functions of 4 to 16 variables on a single integrated circuit

pld board
[click image to get a larger image]

Preparing the Circuit for a CPLD

If you already have a compiled design open, you can skip to assigning pins.

Open your project

Use File | Open Project
You'll be using the door opener from before.

Select your Device

Select Assignments | Device from the pull-down menu.

assigning a device

Select MAX7000S from the "Family" pull-down list.
From the "Available devices" choose EPM7064SLC44-10, which is the device we are using in our lab. Select "OK."

using 7064slc

Compile

You will need to compile your design.

Click on Processing | Start Compilation to start compilation.

compile menu

Assigning Pins:

Select Assignments | Pin Planner  from the pull-down menu.

assigning pins

You'll see a schematic of your device which shows the satus of various pins, with a list of your inputs and outputs below.

assigned pinout

You will notice that the pins around the edges of the chip have different symbols. The plain round circles with nothing written inside of them are used for input and output.

Assign all of your pins to fit in one "bank" of CPLD connections, so only one jumper cable is required. Banks are:

For example, here is bank one.

pld board bank
[click image to get a larger image]

Here is bank two.

pld board bank
[click image to get a larger image]

Select each input and output from the bottom of the screen and drag it on top of the pin you would like to use - make sure you click on the name. (ie. if you want h to be pin 4, click h on the bottom of the screen and drag it on top of the circle under the label 4). Remember, use ONLY the plain round circles!!
You only need to assign your inputs and outputs; you will probably see some other signals listed that you didn't specify. Leave them as they are.

When you are finished you can close the window.

Recompile Design

You will need to compile your design again to fit your design on the PLD board.

Click on Processing | Start Compilation to start compilation.

Setting up Programming Hardware in Quartus II Software:

Connect your USB-Blaster cable to one of the USB ports on your computer.

Note: Under linux, for the programmer to connect, do the following as root once the programmer is plugged into the computer:
From your Quartus II binary directory, (i.e. where the quartus executable is located), run

  1. jtagd
  2. jtagconfig

After this, the programmer should work.

Choose Tools | Programmer. The Programmer window will open.

selecting programmer

The selected programming hardware is identified as. If it says "USB-Blaster [USB-0] mode JTAG" you have the correct hardware (skip to the connection step).

select programmer

Click the Hardware Setup button to open the Hardware Setup window.

Programming hardware that is already set up appears in the Available hardware items window.

usb blaster

If the USB-Blaster is not listed as the Currently selected hardware, select it and click the Add Hardware.

usb blaster 
selected

Click Close.

At the main window, ensure it displays USB-Blaster[USB-0] mode JTAG (see figure below)

Connecting Programming Hardware to the Device:

Connect CPLD board to USB-Blaster cable (connected to a USB port on your PC).

The cable should be attached so that the red edge of the USB-Blaster cable is next to the number (usually a "1" or a "2") that has been written on the board with a marker. IF YOU'RE NOT SURE, ASK!!!

JTAG cable

pld board with JTAG library
[click image to get a larger image]

Connect the ground and power (5v) to the CPLD board and turn the power on.

Click Auto Detect, your program should detect the CPLD.
If it doesn't, there are three possibilities:

  1. You haven't chosen the correct device.
  2. Your cables aren't connected correctly.
  3. Your CPLD is faulty.
Problem Solution
Unable to scan device chain.

This is generally a problem with power. Check:

  1. Is the power and ground connected properly and turned on?
  2. Is the red strip on the USB-Blaster cable connected to the proper side of the board?
JTAG error

This is generally a problem with the connection. Try:

  1. Make sure you have the correct device selected
    • ensure 7064 (not 7032)
    • ensure SLC (not STC)
  2. Unplug the USB-Blaster cable and reconnect.
  3. Try a new USB-Blaster cable.
  4. Try a new CPLD board
License error

This is generally a problem if you haven't done anything with the software recently. The server times out and loses the connection to the licencing file.

  1. Close Quartus and reopen.

Once it autodetects correctly, you can proceed.

auto detect device

Delete the file that shows up.

Click Add File choose 'pof' file

select 
programmer

Check Program/Configure

Select Start, you should see the progress indicator increasing slowly (fast means problem).

Wiring the Input and Output

You can unplug the USB-Blaster cable and turn off the power while you are wiring your circuit. You will not lose your program.

Use the debugger board to wire the input (use the control mode) and the output (use the display mode). (ie. c, h, p & f)

Troubleshooting

If you smell smoke turn off the power immediately and DO NOT touch the Altera chip. It gets extremely hot if it is short circuited. Check all your power and grounds, have someone else check your power and grounds - something IS wrong!! Hopefully, your chip will still work. :)

  1. First, double check your simulation to ensure that your Quartus design is correct. If it is not correct then you will not get the correct output no matter how well everything else is connected.
  2. Next, check your device, even if you think it's right... double check. If you need to change it make sure you recompile.
    • At the top of your pin out file make sure it reads ASSIGNED TO AN: EPM7064SLC44-10
      • ensure 7064 (not 7032)
      • ensure SLC (not STC)
  3. Check your pin assignments and make sure you have not assigned any of your inputs or outputs to reserved pins or specialized pins. Plain circles only (with no writing inside).
  4. Make sure you have power and ground to your boards (CPLD, debugger, breadboard).
  5. Make sure you have the debugger board set up for input and output correctly.
  6. If some signals seem to be right and some seem to be wrong, check your pins to make sure you are in the correct place and use the multimeter to ensure you have good connections.

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