PC319 Digital Design Project

Digital Clock

by

Brensley Edmondson

Kien Duong

Maciek Makarski

December 3, 2001

Specification:

The clock consists of five buttons and one switch. The buttons are: Set Time, Set Alarm, Hour, Minute, Snooze; the switch is Alarm On/Off. The clock runs on military time, example. 4:00 pm = 16:00.

To set the time/set alarm time the user holds the appropriate button (Set Time to set time and Set Alarm to set the alarm time) while changing the hour or the minute. Holding the hour button while the Set Time or Set Alarm buttons are enabled will cycle through the hours from 0 to 23. The minute button works on the same principals, except it cycles form 0 to 59. If the user does not set the time, the clock will be incrementing time from 00:00. 00:00 is the default time the clock displays when it is powered up.

In order for the alarm to go off the current time must equal set alarm time and the alarm switch has to be turned on. If the switch is turned off nothing will happen. If the two times are the same and the switch is turned on then the alarm will sound. Then the user has two options, turn off the alarm by switching it off or hitting the Snooze button. Hitting the Snooze button will make the alarm sound in 10 minutes. Again at that point the user will have the same two options, turning it off or hitting Snooze button again for additional 10 minutes of rest. The 10 minutes for Snooze can be changed to a desired time by the design team but not the end user.

Structured Logic Device Description:

A complex programmable logic device (CPLD) was used for this project. The internal function of a CPLD was written in a Verilog hardware description language (VHDL). The program consists of six functions: Set Time function, Set Alarm Time function, Increment Time function, Comparator function, Converter function, and the Main function. Some of these are self-explanatory but they will be all clarified.

Set Time function: Allows the user to set the time. The default time once the system is powered up is 00:00. If the time is not set it system will start incrementing the time form the 00:00 position.

Set Alarm function: Allows the user to set the alarm time. The alarm will not sound unless the Alarm switch is in the "On" position.

Increment Time function: Increments the clock regardless if the Set Time function was used or not.

Comparator function: Compares the Alarm Time and Display Time, if they are equal the alarm will sound given that the alarm switch is turned on. This function also contains the Snooze feature, which provides the user with an additional 10 minutes of sleep if hit when the alarm sound is on.

Converter function: This converts the binary numbers from hours and minutes into integers. The integers are then broken up into two "one digit" integers (example 23 would be 2 and 3) and then those would be converted into a 4-bit binary number. Overall there would be 4 4-bit outputs, two for the hour and two for the minute. These conversions are needed so that the seven segment display can be used.

Main function: This function combines all the above functions together. This way all the functions are capable of communicating between each other, which is necessary as there are inputs/outputs shared among them.

NOTE: The count was lowered so that the results could be shown using the Waveform Editor. The count would be set up so that is would operate like a real clock, 60 seconds to change a minute.

Circuit Description:

Here is a list of all the components used for the circuit:

4 - breadboards

1 - keypad

3 - resistor packs (1K Ohms)

1 - dip switch

1 - buzzer

1 - Altera EPM 7064SLC44-10 (CPLD)

4 - SN74LS48N chips

4 - seven segment displays LCD

1 – wave generator

Lots of wires

The basic function of the circuit:

The keypad is used for the five buttons (inputs) for the clock, Set Time, Set Alarm, Hour, Minute, and Snooze. Five buttons on the keypad would be assigned to the corresponding pin on the CPLD. Through the use of VHDL the CPLD determines what do to with the inputs from the keypad. If it has to display (output) anything (and it does constantly as long as there is power) the CPLD will have 16 outputs going into 4 - SN74LS48N chips, four per chip. These are the four 4-bit numbers from the Converter Function mentioned in the Structured logic device description. Please refer to that section for more details. In turn these chips will provide the necessary display on the seven segment displays LCD. Each digit for the clock gets it's own SN74LS48N chip and seven segment displays. There is also a dipswitch that acts as an on/off switch for the alarm, and a buzzer that goes off when the switch is on and the display time equals alarm time. The wave generator provides the clock in.

Problems Encountered & Possible Solutions:

We were unable to get the Converter Function to work; even with help we were unable to solve the dilemma. Without the converter function there would be no display as that is a critical piece of the project. But all the hardware was connected and tested, as were the other VHDL functions. The solution could have been done by brute force; writing all the possible conversions through the use of the "if statements". Because of time constraints we were unable to add the necessary code.

References:

We would like to thank Dr. Nora Znotinas, Mr. Terry Sturtevant, Mr. Manfred Gartner, and both PC300 TA's Kevin and Adam for their help with this project.

John F. Wakerly, Digital Design: Principles and Practices, Third Edition Updated, Prentice Hall, 2001.