PC/CP200 Electronics Lab I
Logic Gates Characteristics - Open Collector Outputs
Objectives
- To gain more experience with an oscilloscope.
- To investigate the operation of open-collector gates including the
use of pull-up resistors.
- To investigate the operation of wire-ANDing.
Preparation
The current limits of normal logic gates are reduced with open collector
gates (if using TTL) or open drain gates (with CMOS). The two types of
gates are functionally equivalent, so it's only necessary to discuss
one. The transistors at the outputs of a normal TTL gate can be thought
of as switches, so that the circuitry looks as in Figure 4.1. The two
switches are always in opposite states, so when the upper switch is open,
the lower switch is closed and thus the output is low. (Actually, when
the inputs are in the "undefined" region, the transistors are
both in a state in between "open" and "closed", and
so could be thought of as resistors of some finite value. However we
will only discuss the "normal" cases.)
You will note in this case that the device will be sinking current,
as indicated by the arrow into the device.
If, on the other hand, the upper switch is closed, and the lower switch
is open, so that the circuitry looks as in Figure 4.2, then the output
is high (because it is connected to Vcc through the pull-up resistor.)
In this case, the gate is sourcing current, as indicated by the arrow
coming out of the device.
An open collector gate is much simpler; it consists of only
one switch and no resistor, as in Figure 4.3.
In essence, it only provides low outputs, and relies on an external
pull up resistor to supply high outputs, as shown in Figure 4.4. The
gate will not function properly without the external pull up resistor. Thus
the gate is only ever used to sink current, and so can be optimized for
that function.
The big advantage to the open collector gate is that it can be used to
provide much higher currents, since it only needs to sink them, not source
them, as in Figure 4.5.
An example of this in use is to drive an output device like an LED which
may require more current than normally provided by a TTL gate, as in
Figure 4.6.
Another possibility with open collector outputs is to drive devices
which require a higher voltage than Vcc. Since the gate only needs to
sink current, then the voltage connected to the output resistor can be
anything, so long as it does not overload the sinking ability of the
gate when the output is low. Thus, an open collector gate gives flexibility
in output voltage and current for the cost of a bit of extra wiring.
Open collector gates (and open drain gates) typically use one of the
following symbols.
Equipment
- bench power
- breadboard, resistors, resistor arrays
- SN7401,
SN7400
- oscilloscope - one of TDS 210, TDS 1002 (old and new numbers for
the same oscilloscope)
Procedure
You will have to calculate pull-up resistor values for a number
of the following circuits. See Pull-up
resistor calculation for instructions on calculating the minimum
and the maximum resistor values.
Open Collector (or Open Drain) Outputs
- Connect a 7401 open collector NAND with its inputs tied together
(to act as an inverter) with no load and no pull-up resistor as shown
below. Measure the output voltage for both HIGH and LOW inputs. Are
the output voltages within the data sheet's specified ranges? (They
should not be!) Record both your output voltage and the specified voltage.
- For the following circuit using a 7401 open collector NAND gate,
calculate the minimum and maximum values for a pull-up resistor assuming
that there will be no load.
- Using an appropriate pull-up resistor, construct the above circuit.
Record the value of resistor used. Measure the output voltage for both
HIGH and LOW inputs. Are the output voltages within the data sheet's
specified ranges? (They should be!)
Demonstrate the operation to the lab staff.
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Caution! The
following step uses a wired-AND configuration with a totem-pole
output TTL gate.
If the power is applied to the circuit for more than 2 to 3
seconds, the gates will be destroyed.
NEVER do this in a real circuit! |
- Connect the following circuit using a 7400 NAND. Please note that
this circuit using a wired-AND configuration with a regular TTL gate.
Power the circuit for only 2 or 3 seconds and measure the output
voltage and current. You may have to measure them separately. Is the
current within specified limits for a LOW output?
- For the following circuit using two 7401 open collector NAND gates,
calculate the minimum and maximum values for a pull-up resistor, Rp,
assuming that there will be no load. Please note that there are two input
gates.
- Connect the above circuit using an appropriate pull-up resistor.
Record the value of resistance used. Measure the output voltage and
current. Are the current and voltage within specified limits for a
LOW output? Why is the output LOW and not HIGH?
Demonstrate the operation of your circuit to the lab staff.
- For the following circuit, calculate the minimum and maximum values
for the pull-up resistor, Rp.
- Construct the above circuit using an appropriate pull-up resistor.
Record the value of resistance used. Note that the 7400 NAND gates
are simply in the circuit to provide load. Determine the truth table
for the circuit (excluding the load). Verify the truth table by measuring
the voltage before the load. Are the outputs of the open collector
gates ANDed together as predicted? Is there any relationship between
the voltage and the number of input gates that are HIGH or LOW?
Demonstrate the operation of your circuit to the lab staff.
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