blinkfast.ino.elf: file format elf32-avr Disassembly of section .text: 00000000 <__vectors>: 0: 0c 94 34 00 jmp 0x68 ; 0x68 <__ctors_end> 4: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 8: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 10: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 14: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 18: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 1c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 20: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 24: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 28: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 2c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 30: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 34: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 38: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 3c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 40: 0c 94 48 00 jmp 0x90 ; 0x90 <__vector_16> 44: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 48: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 4c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 50: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 54: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 58: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 5c: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 60: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 64: 0c 94 46 00 jmp 0x8c ; 0x8c <__bad_interrupt> 00000068 <__ctors_end>: 68: 11 24 eor r1, r1 6a: 1f be out 0x3f, r1 ; 63 6c: cf ef ldi r28, 0xFF ; 255 6e: d8 e0 ldi r29, 0x08 ; 8 70: de bf out 0x3e, r29 ; 62 72: cd bf out 0x3d, r28 ; 61 00000074 <__do_clear_bss>: 74: 21 e0 ldi r18, 0x01 ; 1 76: a0 e0 ldi r26, 0x00 ; 0 78: b1 e0 ldi r27, 0x01 ; 1 7a: 01 c0 rjmp .+2 ; 0x7e <.do_clear_bss_start> 0000007c <.do_clear_bss_loop>: 7c: 1d 92 st X+, r1 0000007e <.do_clear_bss_start>: 7e: a9 30 cpi r26, 0x09 ; 9 80: b2 07 cpc r27, r18 82: e1 f7 brne .-8 ; 0x7c <.do_clear_bss_loop> 84: 0e 94 92 00 call 0x124 ; 0x124
88: 0c 94 df 00 jmp 0x1be ; 0x1be <_exit> 0000008c <__bad_interrupt>: 8c: 0c 94 00 00 jmp 0 ; 0x0 <__vectors> 00000090 <__vector_16>: #if defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__) ISR(TIM0_OVF_vect) #else ISR(TIMER0_OVF_vect) #endif { 90: 1f 92 push r1 92: 0f 92 push r0 94: 0f b6 in r0, 0x3f ; 63 96: 0f 92 push r0 98: 11 24 eor r1, r1 9a: 2f 93 push r18 9c: 3f 93 push r19 9e: 8f 93 push r24 a0: 9f 93 push r25 a2: af 93 push r26 a4: bf 93 push r27 // copy these to local variables so they can be stored in registers // (volatile variables must be read from memory on every access) unsigned long m = timer0_millis; a6: 80 91 05 01 lds r24, 0x0105 aa: 90 91 06 01 lds r25, 0x0106 ae: a0 91 07 01 lds r26, 0x0107 b2: b0 91 08 01 lds r27, 0x0108 unsigned char f = timer0_fract; b6: 30 91 04 01 lds r19, 0x0104 m += MILLIS_INC; f += FRACT_INC; ba: 23 e0 ldi r18, 0x03 ; 3 bc: 23 0f add r18, r19 if (f >= FRACT_MAX) { be: 2d 37 cpi r18, 0x7D ; 125 c0: 20 f4 brcc .+8 ; 0xca <__vector_16+0x3a> // copy these to local variables so they can be stored in registers // (volatile variables must be read from memory on every access) unsigned long m = timer0_millis; unsigned char f = timer0_fract; m += MILLIS_INC; c2: 01 96 adiw r24, 0x01 ; 1 c4: a1 1d adc r26, r1 c6: b1 1d adc r27, r1 c8: 05 c0 rjmp .+10 ; 0xd4 <__vector_16+0x44> f += FRACT_INC; if (f >= FRACT_MAX) { f -= FRACT_MAX; ca: 26 e8 ldi r18, 0x86 ; 134 cc: 23 0f add r18, r19 m += 1; ce: 02 96 adiw r24, 0x02 ; 2 d0: a1 1d adc r26, r1 d2: b1 1d adc r27, r1 } timer0_fract = f; d4: 20 93 04 01 sts 0x0104, r18 timer0_millis = m; d8: 80 93 05 01 sts 0x0105, r24 dc: 90 93 06 01 sts 0x0106, r25 e0: a0 93 07 01 sts 0x0107, r26 e4: b0 93 08 01 sts 0x0108, r27 timer0_overflow_count++; e8: 80 91 00 01 lds r24, 0x0100 ec: 90 91 01 01 lds r25, 0x0101 f0: a0 91 02 01 lds r26, 0x0102 f4: b0 91 03 01 lds r27, 0x0103 f8: 01 96 adiw r24, 0x01 ; 1 fa: a1 1d adc r26, r1 fc: b1 1d adc r27, r1 fe: 80 93 00 01 sts 0x0100, r24 102: 90 93 01 01 sts 0x0101, r25 106: a0 93 02 01 sts 0x0102, r26 10a: b0 93 03 01 sts 0x0103, r27 } 10e: bf 91 pop r27 110: af 91 pop r26 112: 9f 91 pop r25 114: 8f 91 pop r24 116: 3f 91 pop r19 118: 2f 91 pop r18 11a: 0f 90 pop r0 11c: 0f be out 0x3f, r0 ; 63 11e: 0f 90 pop r0 120: 1f 90 pop r1 122: 18 95 reti 00000124
: void init() { // this needs to be called before setup() or some functions won't // work there sei(); 124: 78 94 sei // on the ATmega168, timer 0 is also used for fast hardware pwm // (using phase-correct PWM would mean that timer 0 overflowed half as often // resulting in different millis() behavior on the ATmega8 and ATmega168) #if defined(TCCR0A) && defined(WGM01) sbi(TCCR0A, WGM01); 126: 84 b5 in r24, 0x24 ; 36 128: 82 60 ori r24, 0x02 ; 2 12a: 84 bd out 0x24, r24 ; 36 sbi(TCCR0A, WGM00); 12c: 84 b5 in r24, 0x24 ; 36 12e: 81 60 ori r24, 0x01 ; 1 130: 84 bd out 0x24, r24 ; 36 // this combination is for the standard atmega8 sbi(TCCR0, CS01); sbi(TCCR0, CS00); #elif defined(TCCR0B) && defined(CS01) && defined(CS00) // this combination is for the standard 168/328/1280/2560 sbi(TCCR0B, CS01); 132: 85 b5 in r24, 0x25 ; 37 134: 82 60 ori r24, 0x02 ; 2 136: 85 bd out 0x25, r24 ; 37 sbi(TCCR0B, CS00); 138: 85 b5 in r24, 0x25 ; 37 13a: 81 60 ori r24, 0x01 ; 1 13c: 85 bd out 0x25, r24 ; 37 // enable timer 0 overflow interrupt #if defined(TIMSK) && defined(TOIE0) sbi(TIMSK, TOIE0); #elif defined(TIMSK0) && defined(TOIE0) sbi(TIMSK0, TOIE0); 13e: 80 91 6e 00 lds r24, 0x006E 142: 81 60 ori r24, 0x01 ; 1 144: 80 93 6e 00 sts 0x006E, r24 // this is better for motors as it ensures an even waveform // note, however, that fast pwm mode can achieve a frequency of up // 8 MHz (with a 16 MHz clock) at 50% duty cycle #if defined(TCCR1B) && defined(CS11) && defined(CS10) TCCR1B = 0; 148: 10 92 81 00 sts 0x0081, r1 // set timer 1 prescale factor to 64 sbi(TCCR1B, CS11); 14c: 80 91 81 00 lds r24, 0x0081 150: 82 60 ori r24, 0x02 ; 2 152: 80 93 81 00 sts 0x0081, r24 #if F_CPU >= 8000000L sbi(TCCR1B, CS10); 156: 80 91 81 00 lds r24, 0x0081 15a: 81 60 ori r24, 0x01 ; 1 15c: 80 93 81 00 sts 0x0081, r24 sbi(TCCR1, CS10); #endif #endif // put timer 1 in 8-bit phase correct pwm mode #if defined(TCCR1A) && defined(WGM10) sbi(TCCR1A, WGM10); 160: 80 91 80 00 lds r24, 0x0080 164: 81 60 ori r24, 0x01 ; 1 166: 80 93 80 00 sts 0x0080, r24 // set timer 2 prescale factor to 64 #if defined(TCCR2) && defined(CS22) sbi(TCCR2, CS22); #elif defined(TCCR2B) && defined(CS22) sbi(TCCR2B, CS22); 16a: 80 91 b1 00 lds r24, 0x00B1 16e: 84 60 ori r24, 0x04 ; 4 170: 80 93 b1 00 sts 0x00B1, r24 // configure timer 2 for phase correct pwm (8-bit) #if defined(TCCR2) && defined(WGM20) sbi(TCCR2, WGM20); #elif defined(TCCR2A) && defined(WGM20) sbi(TCCR2A, WGM20); 174: 80 91 b0 00 lds r24, 0x00B0 178: 81 60 ori r24, 0x01 ; 1 17a: 80 93 b0 00 sts 0x00B0, r24 #endif #if defined(ADCSRA) // set a2d prescaler so we are inside the desired 50-200 KHz range. #if F_CPU >= 16000000 // 16 MHz / 128 = 125 KHz sbi(ADCSRA, ADPS2); 17e: 80 91 7a 00 lds r24, 0x007A 182: 84 60 ori r24, 0x04 ; 4 184: 80 93 7a 00 sts 0x007A, r24 sbi(ADCSRA, ADPS1); 188: 80 91 7a 00 lds r24, 0x007A 18c: 82 60 ori r24, 0x02 ; 2 18e: 80 93 7a 00 sts 0x007A, r24 sbi(ADCSRA, ADPS0); 192: 80 91 7a 00 lds r24, 0x007A 196: 81 60 ori r24, 0x01 ; 1 198: 80 93 7a 00 sts 0x007A, r24 cbi(ADCSRA, ADPS2); cbi(ADCSRA, ADPS1); sbi(ADCSRA, ADPS0); #endif // enable a2d conversions sbi(ADCSRA, ADEN); 19c: 80 91 7a 00 lds r24, 0x007A 1a0: 80 68 ori r24, 0x80 ; 128 1a2: 80 93 7a 00 sts 0x007A, r24 // here so they can be used as normal digital i/o; they will be // reconnected in Serial.begin() #if defined(UCSRB) UCSRB = 0; #elif defined(UCSR0B) UCSR0B = 0; 1a6: 10 92 c1 00 sts 0x00C1, r1 void setup() { DDRB |= B00100000; //set B5 (13) as output 1aa: 25 9a sbi 0x04, 5 ; 4 setup(); for (;;) { loop(); if (serialEventRun) serialEventRun(); 1ac: c0 e0 ldi r28, 0x00 ; 0 1ae: d0 e0 ldi r29, 0x00 ; 0 } void loop() { PORTB |= B00100000; //set B5 (13) HIGH 1b0: 2d 9a sbi 0x05, 5 ; 5 // delay(500); PORTB &= B11011111; //set B5 (13) LOW 1b2: 2d 98 cbi 0x05, 5 ; 5 1b4: 20 97 sbiw r28, 0x00 ; 0 1b6: e1 f3 breq .-8 ; 0x1b0 1b8: 0e 94 00 00 call 0 ; 0x0 <__vectors> 1bc: f9 cf rjmp .-14 ; 0x1b0 000001be <_exit>: 1be: f8 94 cli 000001c0 <__stop_program>: 1c0: ff cf rjmp .-2 ; 0x1c0 <__stop_program>